Kernel Hardening - security-misc

Code:

+=============== ============== ============ ============= ============== ============
+Vulnerability   User-to-Kernel User-to-User Guest-to-Host Guest-to-Guest Cross-Thread
+=============== ============== ============ ============= ============== ============
+BHI                   X                           X
+GDS                   X              X            X              X
+L1TF                                              X                       (Note 1)
+MDS                   X              X            X              X        (Note 1)
+MMIO                  X              X            X              X        (Note 1)
+Meltdown              X
+Retbleed              X                           X                       (Note 2)
+RFDS                  X              X            X              X
+Spectre_v1            X
+Spectre_v2            X                           X
+Spectre_v2_user                      X                           X
+SRBDS                 X              X            X              X
+SRSO                  X                           X
+SSB (Note 3)
+TAA                   X              X            X              X        (Note 1)
+=============== ============== ============ ============= ============== ============
+
+Notes:
+   1 --  Disables SMT if cross-thread mitigations are selected and CPU is vulnerable
+
+   2 --  Disables SMT if cross-thread mitigations are selected, CPU is vulnerable,
+   and STIBP is not supported
+
+   3 --  Speculative store bypass is always enabled by default (no kernel
+   mitigation applied) unless overridden with spec_store_bypass_disable option

Image:

RFC PATCH 00-34 x86-bugs: Attack vector controls

Markdown Table:

Vulnerability User-to-Kernel User-to-User Guest-to-Host Guest-to-Guest Cross-Thread
BHI :x: :x:
GDS :x: :x: :x: :x:
L1TF :x: [1]
MDS :x: :x: :x: :x: [1:1]
MMIO :x: :x: :x: :x: [1:2]
Meltdown :x:
Retbleed :x: :x: [2]
RFDS :x: :x: :x: :x:
Spectre_v1 :x:
Spectre_v2 :x: :x:
Spectre_v2_user :x: :x:
SRBDS :x: :x: :x: :x:
SRSO :x: :x:
SSB[3]
TAA :x: :x: :x: :x: [1:3]

  1. Disables SMT if cross-thread mitigations are selected and CPU is vulnerable ↩︎ ↩︎ ↩︎ ↩︎

  2. Disables SMT if cross-thread mitigations are selected, CPU is vulnerable, and STIBP is not supported ↩︎

  3. Speculative store bypass is always enabled by default (no kernel mitigation applied) unless overridden with spec_store_bypass_disable option ↩︎

2 Likes